Lewis Ho

Convergence Rates for Latent Mixing Measures in Infinite Homoscedastic Location-Scale Mixture Models

Knowledge Transfer Scaling Laws for 3D Medical Imaging

$Ab$ $initio$ modeling of Galactic dust polarized CMB foreground

Neural Network Representation of Generalized Parton Distributions (NNGPD)

Accelerating integrated modeling with surrogate-based optimization: the MAESTRO workflow

The Challenge of Classification Confidence Estimation in Dynamically-Adaptive Neural Networks

The Challenge of Classification Confidence Estimation in Dynamically-Adaptive Neural Networks — Citations: 0.

Fine-grained Timing Analysis of Digital Integrated Circuits in Answer Set Programming

Fine-grained Timing Analysis of Digital Integrated Circuits in Answer Set Programming — In the design of integrated circuits, one critical metric is the maximum delay introduced by combinational modules within the circuit. This delay is crucial because it represents the time required to perform a computation: in an Arithmetic Logic Unit, it represents the maximum time taken by the circuit to perform an arithmetic operation. When such a circuit is part of a larger, synchronous system, like a CPU, the maximum delay directly impacts the maximum clock frequency of the entire system. — Citations: 1.